The burgeoning field of artificial intelligence faces a significant structural bottleneck in its computational processes, often likened to a data relay race. Each AI query initiates a complex journey where information repeatedly travels from memory to a CPU for preprocessing, then to a GPU for intensive computation, and finally back to memory for every word generated. This constant routing through expensive and power-intensive chips on every request represents a core inefficiency that XCENA, a startup with offices in South Korea and the U.S., is actively striving to overcome.

XCENA, founded in 2022 by Samsung and SK Hynix veterans Jin Kim (CEO), Dohun Kim (CTO), and Harry Juhyun Kim (CPO), has developed an innovative chip designed to place compute capabilities much closer to DRAM, the fast, short-term memory chips essential for active data storage. This design allows routine data operations to be handled directly near memory, thereby eliminating the costly and time-consuming round trips between CPUs, GPUs, and memory modules. According to CEO Jin Kim, "CPUs and GPUs have both gotten smarter over the decades. Memory never did. XCENA wants to change that," highlighting a broader industry shift towards memory-centric architectures, a trend underscored by the recent trillion-dollar valuations of memory giants like Samsung, SK Hynix, and Micron.

The company's core thesis is that "inference isn’t just a compute problem; it’s increasingly a memory scaling problem." XCENA's chip, named MX1, connects to the CPU via Compute Express Link (CXL), establishing a dedicated express lane for efficient processor-to-memory communication. This allows the MX1 to process data within the memory module itself, effectively bringing compute to the data rather than the traditional method of moving data to compute units. This paradigm shift holds significant implications for AI infrastructure costs, with XCENA claiming that what previously required 10 servers could potentially run on just one.

While GPUs are highly efficient at matrix multiplication, which forms the mathematical backbone of AI model training, many surrounding data orchestration tasks, such as preprocessing, KV cache management (for storing conversation context), and data caching, still primarily rely on CPUs. The MX1 chip is engineered to handle these specific memory-intensive tasks directly within the memory module, offloading them from the CPU and further streamlining the AI computation process. The timing appears favorable for XCENA, given the surging demand for memory solutions since the latter half of the previous year.

Investor enthusiasm reflects the potential for XCENA's technology to significantly impact AI infrastructure expenses. The startup recently concluded a Series B funding round, raising $135 million at a $570 million valuation, bringing its total capital raised to an impressive $185 million. The company's ideal customers are hyperscalers, who invest tens of billions annually in AI infrastructure, where even minor gains in memory efficiency can translate into hundreds of millions in savings.

The MX1 is currently a prototype, with mass production chips slated to commence rolling off Samsung's foundry lines by the end of 2026. XCENA anticipates generating revenue starting in 2027. Unlike neural processing unit (NPU) makers that challenge Nvidia in training workloads, XCENA targets the foundational, memory-intensive layer beneath all AI operations.

XCENA faces competition from Nasdaq-listed companies like Astera Labs and Marvell, which are also developing next-generation memory connectivity solutions. Jin Kim differentiates XCENA through its intellectual property, specifically its use of thousands of small, efficient RISC-V cores optimized for data processing, in contrast to Marvell's approach of a handful of general-purpose cores. Furthermore, XCENA boasts a high degree of vertical integration, designing its own internal memory hierarchy, interconnect bus, and DRAM controller, components that most chip companies, including larger rivals, typically outsource. The Series B round was co-led by Seoul-based VC firms Atinum and IMM Investment, alongside Corstone Asia, with continued support from existing investors SBI Investment and Mirae Asset Capital. The company, which employs over 90 staff across its offices in Pangyo and Sunnyvale, is also engaging with international investors for additional funding.